At advanced nodes the hot corner is faster at low voltage: threshold voltage falls with temperature faster than mobility loss slows the transistor. The crossing is the temperature-inversion voltage — below it, 125 °C is no longer the worst case, which changes which corner a low-voltage sign-off has to be run at. The two widths are the extra VDD the slower corner needs to reach 1.2 GHz and 2.0 GHz; note that the slower corner swaps between them.

A transfer curve spans decades of current, so it is only readable with current on a log scale. That is the y axis, and a sweep reads any test, including a derived one — so each step is swept as log10(t[n]). (A log x axis is xScale; see sweep 5.) The width at log10 Id = −7 (100 nA) is the gate-voltage shift between the two drain biases at constant current — the constant-current threshold shift. Divided by the 0.75 V change in Vds it is DIBL. The curves never cross, so crossing: false keeps the card from reporting that.

The map opens on Subthreshold slope, a derived test of two of those derived tests: 0.1 / (t[3202] - t[3200]), the gate voltage per decade of current. The † in front of its name says it was not measured.

The two cell states drift towards each other as charge leaks during an accelerated bake; the crossing is where the median read window closes completely. The read points are not evenly spaced — they rarely are in a qualification — which is what xValues is for: with it the crossing is reported in hours, and without it the axis would be the ordinal position of each read, with the crossing "between the 8th and 9th". Nothing is interpolated along test numbers, which are identifiers, not a scale.

The tests are named as ranges, in the same 3300..3308 syntax a derived-test expression uses. A range picks up only the tests that exist inside it, so a program numbered in steps of two needs nothing extra; if one of them is missing from the data, the range comes up one short of xValues and the card says so, rather than sliding every later bake time onto the wrong read.

As load current rises, the high output sags and the low output climbs. Where they cross, the pin can no longer present two distinguishable logic levels: that current is the absolute ceiling on what the driver can deliver, well beyond where it would already have left the VOH/VOL spec. The p10–p90 bands show how much of the population gets there early. xUnit makes the axis and the crossing read 8 mA rather than a bare number beside "(mA)".

Each test is one point of a cumulative distribution: the fraction of RRAM cells whose low-resistance state reads below a threshold. The program writes the threshold only into the test text, so xFromName reads it from there — {x} takes the number with its SI prefix, so 12K is 12,000 Ω. It is a placeholder pattern, not a regular expression, so a shared sweeps file cannot freeze the app.

The thresholds go up by multiples, so xScale: 'log' gives each the same room. On a log axis the width at 0.5 is a ratio — how many times higher the median cell resistance is after the bake — with both ends shown. Two distributions of the same cells are not expected to meet, so crossing: false.